An 8-Channel, 46-ps-Precision TDC ASIC with Improved Vernier Delay Loop for STCF EMC

摘要: An 8-channel Time-to-Digital Converter (TDC) with high precision and high linearity for the electromagnetic calorimeter (EMC) in the super tau-charm facility (STCF) is presented. The 3-level quantization structure is employed in the proposed TDC to achieve high time resolution and wide dynamic range simultaneously. A double triggered counter characterized with metastability eliminating is used as the first level. The second and third level are implemented with a polyphase clock sampler and a modified Vernier Delay Loop (VDL) with automatic reset mechanism, respectively. Two low-jitter Delay Locked Loops (DLLs) with different length are utilized to assist in vernier measurement and the polyphase clocks are also provided by the longer DLL. Theoretical analysis with respect to the optimal combination of DLL length and reference clock frequency has been presented. The proposed 8-channel TDC is implemented using 180-nm standard CMOS process with 1.8-V power supply. Under the reference clock frequency of 100-MHz, the TDC is realized with a resolution of 41.7-ps and a dynamic range of 2560-ns. According to testing results, the best single-shoot precision is 46-ps and good consistency among all channels can be observed. The effect of sliding scaled technique on improving conversion linearity is also proved with experiment results. In asynchronous measurements, the maximum differential nonlinearity (DNL) and the integral nonlinearity (INL) are less than 0.4-LSB and 0.5-LSB respectively.