分类: 核科学技术 >> 核探测技术与核电子学 提交时间: 2023-06-18 合作期刊: 《Nuclear Science and Techniques》
摘要: Experimental evidence is presented showing obvious azimuthal dependence of single event upsets (SEU) and multiple-bit upset (MBU) patterns in radiation hardened by design (RHBD) and MBU-sensitive static random access memories (SRAMs), due to the anisotropic device layouts. Depending on the test devices, a discrepancy from 24.5% to 50% in the SEU cross sections of dual interlock cell (DICE) SRAMs is shown between two perpendicular ion azimuths under the same tilt angle. Significant angular dependence of the SEU data in this kind of design is also observed, which does not fit the inverse-cosine law in the effective LET method. Ion trajectory-oriented MBU patterns are identified, which is also affected by the topological distribution of sensitive volumes. Due to that the sensitive volumes are periodically isolated by the BL/BLB contacts along the Y-axis direction, double-bit upsets along the X-axis become the predominant configuration under normal incidence. Predominant triple-bit upset and quadruple-bit upset patterns are the same under different ion azimuths (L-shaped and square-shaped configurations, respectively). Those results suggest that traditional RPP/IRPP model should be promoted to consider the azimuthal and angular dependence of single event effects in certain designs. During earth-based evaluation of SEE sensitivity, worst case beam direction, i.e., the worst case response, should be revealed to avoid underestimation of the on-orbit error rate.
分类: 核科学技术 >> 核探测技术与核电子学 提交时间: 2023-06-18 合作期刊: 《Nuclear Science and Techniques》
摘要: Single event effects (SEEs) induced by radiations become a significant reliability challenge for modern electronic systems. To evaluate SEEs susceptibility for microelectronic devices and integrated circuits (ICs), an SEE testing system with flexibility and robustness was developed at Heavy Ion Research Facility in Lanzhou (HIRFL). The system is compatible with various types of microelectronic devices and ICs, and supports plenty of complex and high-speed test schemes and plans for the irradiated devices under test (DUTs). Thanks to the combination of meticulous circuit design and the hardened logic design, the system has additional performances to avoid an overheated situation and irradiations by stray radiations. The system has been tested and verified by experiments for irradiating devices at HIRFL.